24.8.3 Event Control in COUNT16 mode (CTRLA.MODE=1)
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | EVCTRL |
Offset: | 0x04 |
Reset: | 0x00000000 |
Property: | PAC Write-Protection, Enable-Protected |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
PERDEO | |||||||||
Access | R/W | ||||||||
Reset | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
TAMPEVEI | |||||||||
Access | R/W | ||||||||
Reset | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
OVFEO | TAMPEREO | CMPEO3 | CMPEO2 | CMPEO1 | CMPEO0 | ||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
PEREO7 | PEREO6 | PEREO5 | PEREO4 | PEREO3 | PEREO2 | PEREO1 | PEREO0 | ||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 24 – PERDEO Periodic Interval Daily Event Output Enable
Value | Description |
---|---|
0 | Periodic Daily event is disabled and will not be generated. |
1 |
Periodic Daily event is enabled and will be generated. The event occurs at the overflow of the RTC counter (i.e., when the RTC counter goes from 0xFFFF to 0x0000). |
Bit 16 – TAMPEVEI Tamper Event Input Enable
Value | Description |
---|---|
0 | Tamper event input is disabled, and incoming events will be ignored |
1 | Tamper event input is enabled, and incoming events will capture the COUNT value |
Bit 15 – OVFEO Overflow Event Output Enable
Value | Description |
---|---|
0 | Overflow event is disabled and will not be generated. |
1 | Overflow event is enabled and will be generated for every overflow. |
Bit 14 – TAMPEREO Tamper Event Output Enable
Value | Description |
---|---|
0 | Tamper event output is disabled, and will not be generated. |
1 | Tamper event output is enabled, and will be generated for every tamper input. |
Bits 8, 9, 10, 11 – CMPEOn Compare n Event Output Enable [n = 3..0]
Value | Description |
---|---|
0 | Compare n event is disabled and will not be generated. |
1 | Compare n event is enabled and will be generated for every compare match. |
Bits 0, 1, 2, 3, 4, 5, 6, 7 – PEREOn Periodic Interval n Event Output Enable [n = 7..0]
Note: The PEREO5, PEREO6, and PEREO7 bits are not available on 100 pin packages and
144 pin TFBGA, (RTC_IN[5:7] and RTC_OUT[5:7]).
Value | Description |
---|---|
0 | Periodic Interval n event is disabled and will not be generated. |
1 | Periodic Interval n event is enabled and will be generated. |