24.8.4 Interrupt Enable Clear in COUNT16 mode (CTRLA.MODE=1)
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | INTENCLR |
| Offset: | 0x08 |
| Reset: | 0x0000 |
| Property: | PAC Write-Protection |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| OVF | TAMPER | CMP3 | CMP2 | CMP1 | CMP0 | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PER7 | PER6 | PER5 | PER4 | PER3 | PER2 | PER1 | PER0 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 15 – OVF Overflow Interrupt Enable
| Value | Description |
|---|---|
| 0 | The Overflow interrupt is disabled. |
| 1 | The Overflow interrupt is enabled. |
Bit 14 – TAMPER Tamper Interrupt Enable
| Value | Description |
|---|---|
| 0 | The Tamper interrupt is disabled. |
| 1 | The Tamper interrupt is enabled. |
Bits 8, 9, 10, 11 – CMPn Compare n Interrupt Enable [n = 3..0]
| Value | Description |
|---|---|
| 0 | The Compare n interrupt is disabled. |
| 1 | The Compare n interrupt is enabled. |
Bits 0, 1, 2, 3, 4, 5, 6, 7 – PERn Periodic Interval n Interrupt Enable [n = 7..0]
Note: The
PER5, PER6, and PER7 bits are not available on 100 pin packages and 144 pin
TFBGA, (RTC_IN[5:7] and RTC_OUT[5:7]).
| Value | Description |
|---|---|
| 0 | Periodic Interval n interrupt is disabled. |
| 1 | Periodic Interval n interrupt is enabled. |