24.8.7 Debug Control

Table 24-26. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: DBGCTRL
Offset: 0x0E
Reset: 0x00
Property: PAC Write-Protection

Bit 76543210 
        DBGRUN 
Access R/W 
Reset 0 

Bit 0 – DBGRUN Debug Run

This bit is not reset by a software reset.

This bit controls the functionality when the CPU is halted by an external debugger.

ValueDescription
0The RTC is halted when the CPU is halted by an external debugger.
1The RTC continues normal operation when the CPU is halted by an external debugger.