34.12.13 Peripheral Multiplexing m

There are up to 16 Peripheral Multiplexing registers in each group, one for every set of two subsequent I/O lines. The m denotes the number of the set of I/O lines.

Table 34-18. Peripheral Port Mux Control Mapping
Port

PINCFGn.MUXEN

Value

Port

WRCONFIG.PMUX

Value

Peripheral FunctionDescription
0N/APort Normal Port in /out functions (Pxy)
100EIC / EIC_EXTINT(n)External Interrupts
101ADC / CMPADC and Analog Comparator
103SERCOM(n)SERCOMn (UART, I2C, SPI)
104EBIExternal Bus Interface
105TCC WO(n)Timer/Counter Controller
106MLBMedia Local Bus
107CAN(n) / SQI(n)CAN, Serial Quad Interface
108SDMMCSD/MMC Host Controller (Memory Card Interface)
109I2S / SWCLK, SWDIO, SWO, TRACE_CLK, TRACE_DATA[3:0]I2S audio and, Debug and debug Trace
10AETHEthernet
10BOnly 2 alternate ETH signalsRX_CLK on PD12 and

GTX_CLK on PD05

10CGCLKControls GCLK_IO[7:2]
10FPTCPeripheral Touch Controller
Note: All undefined values of WRCONFIG.PMUX are reserved.
Table 34-19. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: PMUXm
Offset: 0x30 + m*0x01 [m=0..15]
Reset: 0x00
Property: PAC Write-Protection

Bit 76543210 
 PMUXO[3:0]PMUXE[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 7:4 – PMUXO[3:0] Peripheral Multiplexing for Odd-Numbered Pin

These bits select the peripheral function for odd-numbered pins (2*n + 1) of a PORT group, if the corresponding PINCFGn.PMUXEN bit is '1'.

Not all possible values for this selection may be valid. For more details, refer to the Pinout.

Table 34-21. Peripheral Port Mux Control Mapping
Port

PINCFGn.MUXEN value

Port

WRCONFIG.PMUX value

Peripheral FunctionDescription
0N/APortNormal Port I/O functions
10x0EICExternal Interrupts
10x1ADCN/ADC/ACADC and Analog Comparator
10x2SERCOMSERCOMn (UART, I2C, SPI)
10x3SERCOM AltSERCOMn (UART, I2C, SPI)
10x4EBIExternal Bus Interface
10x5TCCTimer/Counter controller
10x6TCC Alt/PDECTimer/Counter controller and Positional Decoder
10x7COMSQI/CAN/USB
10x8SDMMCSD/MMC Host Controller (Memory Card Interface)
10x9SPI_IXSSPI_IXS Audio
10xaPCCParallel Capture Controller
10xbETHEthernet
10xcMISCGCLK/CCL/AC Alt
10xdPTCPeripheral Touch Controller

Bits 3:0 – PMUXE[3:0] Peripheral Multiplexing for Even-Numbered Pin

These bits select the peripheral function for even-numbered pins (2*n) of a PORT group, if the corresponding PINCFGn.PMUXEN bit is '1'.

Not all possible values for this selection may be valid. For more details, refer to the Pinout.

Table 34-20. Peripheral Port Mux Control Mapping
Port

PINCFGn.MUXEN value

Port

WRCONFIG.PMUX value

Peripheral FunctionDescription
0N/APortNormal Port I/O functions
10x0EICExternal Interrupts
10x1ADCN/ADC/ACADC and Analog Comparator
10x2SERCOMSERCOMn (UART, I2C, SPI)
10x3SERCOM AltSERCOMn (UART, I2C, SPI)
10x4EBIExternal Bus Interface
10x5TCCTimer/Counter controller
10x6TCC Alt/PDECTimer/Counter controller and Positional Decoder
10x7COMSQI/CAN/USB
10x8SDMMCSD/MMC Host Controller (Memory Card Interface)
10x9SPI_IXSSPI_IXS Audio
10xaPCCParallel Capture Controller
10xbETHEthernet
10xcMISCGCLK/CCL/AC Alt
10xdPTCPeripheral Touch Controller