39.7.8 Register Write Protection
To prevent any single software error that may corrupt EBI behavior, the registers listed below can be write-protected by setting the WPEN bit in the SMC Write Protection Mode register (SMC WPMR).
If a write access in a write-protected register is detected, the WPVS flag in the SMC Write Protection Status register (SMC WPSR) is set and the field WPVSRC indicates in which register the write access has been attempted.
The WPVS flag is automatically cleared after reading the SSMC WPSR. The following registers can be write-protected:
- SETUP Register
- PULSE Register
- CYCLE Register
- MODE Register
- Off-chip Memory Scrambling Register