14.5.2 Core Initialization

The Arm Cotex-M7 Core’s TCM Control registers (ITCMCR, DTCMCR) must be programmed before initializing clocks and other peripherals.

The following bit assignments for the Cortex-M7 {I|D}TCMCR register must be set before using this module with a Cortex-M7 device:

• [6:3] SZ - TCM size must indicate the size of the TCM = [128KB (0b1000)]

  (D0TCM and D1TCM are stacked into one Data TCM 128 KB in size)

• [2] RETEN (retry phase enable) = 1
• [1] RMW must be enabled = 1
• [0] TCM enabled = 1

Then the TCM must be enabled by writing the SCB register (System Control Block register) on the Cortex-M7 processor (see Arm specification). When the device comes out of reset, the ECC memory will be in an unknown state.