14.5.9 Interrupts
Each of the interrupt sources defined in the INTFLAG register are first AND’d with the corresponding enable bit in INTENSET and then these results are OR’d together to serve as a single interrupt vector in the NVIC module.
Each of the interrupt sources defined in the INTFLAG register are first AND’d with the corresponding enable bit in INTENSET and then these results are OR’d together to serve as a single interrupt vector in the NVIC module.
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