14.5.7 ECC Error Injection for Testing
To check the ECC functionality, an error can be introduced by the application software at a specified location and the application can verify the correct response of the module.
When set FLTCTRL.FLTEN = 1, Write fault injection occurs at the ITCM address defined by IFLTADR.FLTADR and the Data TCM address defined by DFLTADR.D1D0EN and DFLTADR.FLTADR. The type of error (single or double) is defined by FLTCTRL.FLTMD.
The two fields in IFLTPTR or DFLTPTR, FLT1PTR[6:0] and FLT2PTR[6:0], indicate the bit or bits to invert. Single fault injection always uses FLT1PTR. Double bit faults require the use of both fields.
For writes, fault Injection always occurs between the ECC logic and the RAM, meaning that errors are injected after the ECC calculation but prior to the data write to RAM. To achieve this a write would need to be performed to the address to inject the error in the data which gets stored in RAM.
Read faults are checked by corrupting data in the RAM by a write fault injection into a RAM Specific address location by following these steps:
- With ECC enabled, initialize the test location with the data to be used.
This should then initialize the ECC fields. For ITCM, use 64 bit writes.
- Disable ECC, write another data value, which should then break the ECC data
previously written.
To verify SEC, change just one bit. For DED, change two bits.
- Read back of the same RAM address location with the read ECC logic disabled, allowing the user to verify fault injection of the corrupt data was successful.
- Reenable the ECC.
- Read back of the same RAM address location. The read ECC logic corrects/detects the known error, verifying the Read ECC logic corrects/detects errors correctly.