31.3.10.6 Performance

To process each byte of data (8-bits), the calculation takes one peripheral clock. However, it reads a multi-byte Flash word and operates on all those bytes each read. Since the Flash Read Word, or Flash Word in Bytes (FWB), is 32 bytes long it takes 32 clocks to calculate a CRC.

Since the CRC is reading the Flash it must also use the system Flash Wait States, FWS. The time to get the Flash data into the shift register is FWS+1. Also, if the system continues to access flash, the CRC logic is lowest priority and must wait until there is an idle cycle.

The logic periodically reads the flash to supply data to the calculation. The PERIOD is programmable from 0 to 4095 extra Period Clock (PerCLK) counts from the end of the calculation. (The PerCLK is an 8MHz fixed frequency clock derived from the 48 MHz Precision Internal RC Oscillator.) Though selecting a period of zero clocks will not completely cut off the system flash bandwidth, it could be severely limiting. System bandwidth can be less than half under such conditions. Low period selections are useful during light loads or scheduled checks. When running with auto repeat, an appropriate period value is one that finishes the calculation before to the maximum user allotted time.

Lastly, the CRC needs to know the Message Length, MLEN, in bytes over which to perform the calculation. Note that neither the starting address of the message nor the message length need to be aligned to Flash Read Bytes.