43.7.5 Comparator Interrupt Enable Clear (AC)
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | INTENCLR |
Offset: | 0x10 |
Reset: | 0x00000000 |
Property: | PAC Write-Protection |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
WIN0 | |||||||||
Access | R/W | ||||||||
Reset | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
COMP1 | COMP0 | ||||||||
Access | R/W | R/W | |||||||
Reset | 0 | 0 |
Bit 8 – WIN0 Window 0 Interrupt Enable
Reading this bit returns the state of the Window 0 interrupt enable.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit disables the Window interrupt.
Value | Description |
---|---|
0 | The Window 0 interrupt is disabled. |
1 | The Window 0 interrupt is enabled. |
Bits 0, 1 – COMPx Comparator x Interrupt Enable
Reading this bit returns the state of the Comparator x interrupt enable.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit disables the Comparator x interrupt.
Value | Description |
---|---|
0 | The Comparator x interrupt is disabled. |
1 | The Comparator x interrupt is enabled. |