42.6.7 DMA Operation
| Instance | Channel | CHCTRLB.TR IG [index] | Presentation |
|---|---|---|---|
| ADC | PFFRDY | 75 | ADC DMA PFFRDY trigger |
The DMA can be programmed to read the APB Bus FIFO when there is available data. The DMA can read from the FIFO when the FIFO is half full or when the FIFO is not empty (i.e. it is “Ready”). The bit PFFCTRL.PFFRDYDMA controls this choice.
For the FIFO to work, first enable bit by setting PFFCTRL.PFFEN to one. Next enable the FIFO to capture data from one or more ADC Modules in operation by setting PFFCTRL.
PFFCRn to one for all n in use.