47.5.9 Interrupt Events

The interrupt events from the peripheral are persistent, which means they remain active until the condition that generated the interrupt is cleared by the CPU.

Note: In order to clear any pending interrupt flag in the status register, it is recommended to use the SPIxSTATCLR SFR instead of directly writing the SPIxSTAT SFR.

Standard Buffer Mode Interrupts

In standard buffer mode, when the transmit buffer is empty, the SPI generates a transmit service request interrupt. This activity matches the activity of SPITBE. When the receive buffer is full, the SPI generates a receive service request interrupt. This activity matches the activity of SPIRBF.

Buffer Mode Interrupts

The SPI generates transmit and receive service request interrupts based on the amount of data in the respective FIFO. Software controls this level independently for transmit and receive using the SPIxC- TRL_*.STXISEL and SPIxCTRL_*.SRXISEL fields.

The generation of the service request interrupts does not necessarily match the operation of SPITBE and SPIRBF.

Error Interrupts

The peripheral reports error status for receive overflow (SPIROV), transmit underrun (SPITUR) and frame error (FRMERR). If enabled by SPIROVEN, SPITUREN, or FRMERREN, respectively, the SPI peripheral generates an error event interrupt.

The SPI sets SPIROV if it receives a new serial-word when receive buffer is full (as defined by SPIRBF).

For FRMEN=1, the SPI sets SPITUR if it detects a transmit underrun condition.

The SPI sets FRMERR if it detects multiple frame sync pulses during a burst.