12.10.9 PIE7

Peripheral Interrupt Enable Register 7
Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by registers PIE1 through PIE7.
Name: PIE7
Offset: 0x009D

Bit 76543210 
     CLB1IE3CLB1IE2CLB1IE1CLB1IE0 
Access R/WR/WR/WR/W 
Reset 0000 

Bit 3 – CLB1IE3 CLB1 Interrupt 3 Enable

ValueDescription
1 CLB1 interrupt 3 is enabled
0 CLB1 interrupt 3 is disabled

Bit 2 – CLB1IE2 CLB1 Interrupt 2 Enable

ValueDescription
1 CLB1 interrupt 2 is enabled
0 CLB1 interrupt 2 is disabled

Bit 1 – CLB1IE1 CLB1 Interrupt 1 Enable

ValueDescription
1 CLB1 interrupt 1 is enabled
0 CLB1 interrupt 1 is disabled

Bit 0 – CLB1IE0 CLB1 Interrupt 0 Enable

ValueDescription
1 CLB1 interrupt 0 is enabled
0 CLB1 interrupt 0 is disabled
Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by registers PIE1 through PIE7.