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PolarFire FPGA Board Design User Guide
PolarFire FPGA Board Design User Guide
  1. Home
  2. 1 Designing the Board
  3. 1.6 DDR
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  • Introduction
  • 1 Designing the Board
    • 1.1 Power Supplies
    • 1.2 I/O Glitch
    • 1.3 User I/O
    • 1.4 Clocks
    • 1.5 Reset
    • 1.6 DDR
    • 1.7 Device Programming
    • 1.8 Transceiver
    • 1.9 MIPI Hardware Design Guidelines
    • 1.10 AC and DC Coupling
    • 1.11 Brownout Detection
  • 2 Board Design Checklist
  • 3 Appendix: General Layout Design Practices
  • 4 Revision History
  • Microchip FPGA Support
  • Microchip Information

1.6 DDR

(Ask a Question)

PolarFire devices support DDR3, DDR3L, LPDDR3, and DDR4. For more information about the DDR support in PolarFire devices, see PolarFire FPGA Datasheet .

The reliability of the DDR interface depends on the quality of the layout. For detailed information on board layout and routing, see PolarFire Family Memory Controller User Guide .

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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