2.6.1 Transceiver Initialization Data

After completion of the Libero SoC customization, the XCVR, PCIe, TxPLL, and CCCs are autonomously configured and initialized during the design generation. The register customization can be reviewed in a report generated during the Generate Design Initialization Data step within Libero SoC. A “configuration Report for SERDES XCVR, PCIe, CC, Transmit PLL” is generated that records the value in the related registers. The report is located in the project\designer\impl\Design_Initialization_Data_report.xml.