20.2.2.3.6 Misc

Use the Misc tab to enable the following options:

  • Trace functionality
  • JTAG (Debug) functionality
  • Interrupts to/from MSS
  • Configuring GPIO Interrupt Register
  • Exposing Boot Status ports
  • Exposing feedback ports to fabric
Figure 20-38. Misc Tab

For more information, see PolarFire SoC FPGA MSS Technical Reference Manual .

By default, these options are marked as Unused. When any of the options are enabled, the corresponding ports are exposed on the MSS block (see the following figure).

Boot Status: When Expose Boot Status ports option is selected, the ports BOOT_FAIL_CLEAR_F2M and BOOT_FAIL_ERROR_M2F are exposed as shown in the following figure. Both the signals typically represent binary states through voltage levels and are generally synchronous with the MSS clock.

Figure 20-39. PFSOC_MSS_C0_0 Jtag Trace Enabled

Boot_fail_error_M2F is a signal from the MSS to the FPGA fabric that indicates a boot failure has occurred. When the MSS detects the failure, it sets this signal high and informs the fabric to take action or log the issue.

Boot_Fail_Clear_F2M is a signal from the FPGA fabric to inform the MSS that the boot failure has been addressed. When the FPGA fabric handles the issue, it sets the signal high telling the MSS to clear the boot failure status.

MSS Feedback and Debug Ports: This option is only available for production devices. If selected, a group of MSS_FEEDBACK_DEBUG ports are exposed as shown in the following figure.

Figure 20-40. MSS Module With MSS_FEEDBACK_DEBUG Ports Exposed
Important: In a Libero project, when System Controller Suspend Mode is enabled (Project > Project Settings > Device settings), the PFSOC_SCSM macro must be instantiated in the user design and the REBOOT_REQUESTED_M2F pin of MSS must be connected to the SC_WAKE pin of PFSOC_SCSM macro to wake up the system controller temporarily so it can reboot the MSS during normal operation.