5.2 External Reset

The IS20xxS SoC provides a Watchdog Timer (WDT) to reset the SoC. It has an integrated Power-on Reset (POR) circuit that resets all circuits to a known Power-on state. This action is also driven by an external Reset signal, which is used to control the device externally by forcing it into a POR state. The RST_N signal input is active-low and no connection is required in most of the applications.