Figure 51-89. Gain Error vs. VREF+
(ADC Single-Ended Mode, TAD = 1 µs, VDD = 3.0V, CPON =
1)
Figure 51-90. Gain Error vs. TAD
(ADC Single-Ended Mode, VREF+ = VDD = 3.0V, CPON =
1)
Figure 51-91. Offset Error vs. VREF+
(ADC Single-Ended Mode, TAD = 1 µs, VDD = 3.0V, CPON
= 1)
Figure 51-92. Offset Error vs.
TAD (ADC Single-Ended Mode, VREF+ = VDD =
3.0V, CPON = 1)
Figure 51-93. DNL vs. ADC code (ADC
Single-Ended Mode, TAD = 1 µs, VDD = 3.0V)
Figure 51-94. INL vs. ADC code (ADC
Single-Ended Mode, TAD = 1 µs, VDD = 3.0V)
Figure 51-95. DNL vs. VREF+ (ADC
Single-Ended Mode TAD = 1 µs, VDD = 3.0V, T = 125°C, CPON =
1)
Figure 51-96. INL vs. VREF+ (ADC
Single-Ended Mode TAD = 1 µs, VDD = 3.0V, T = 125°C, CPON =
1)
Figure 51-97. DNL vs. TAD (ADC
Single-Ended Mode, VREF+ = VDD = 3.0V, T = 125°C, CPON =
1)
Figure 51-98. INL vs. TAD (ADC
Single-Ended Mode, VREF+ = VDD = 3.0V, T = 125°C, CPON =
1)
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