7.1 Block Diagram

Figure 7-1. Power Subsystem Block Diagram
The power domains of PIC32CX-BZ2 and WBZ45 are as follows:
  • VDD - 1.9V to 3.6V, Main Supply powering VDDIO, FLASH_VDD, AVDD, PMU_VDDIO, PMU_VDDP
    • VDDIO
      • 1.9V to 3.6, powering the AON, PMU-CTRL, AN/GPIO, INT0/MCLR, BKUP
    • FLASH_VDD
      • 1.9V to 3.6V, Filtered version of VDD (powering the Flash)
    • AVDD
      • 1.9V to 3.6V, Filtered version of VDD for system analog functionality
    • PMU_VDDIO
      • 1.9V to 3.6V, Filtered version of VDD (powering the PMU sub-system)
    • PMU_VDDP
      • 1.9V to 3.6V, Filtered version of VDD (powering the PMU sub-system)
  • GND
    • Common GND for digital, analog and RF sub-systems
Other power supply pins are as follows:
  • CLDO
    • Output pin for the internal voltage regulator for decoupling, this pin must not be used as an external power supply source
    • CLDO output is 1.2V
    • CLDO powers the VDDCORE
    • VDDCORE serves as the internal voltage regulator output. It powers the core, memories, peripherals
  • PMU_BK_LX
    • Switching node for the Buck converter
  • PMU_MLDO_OUT
    • 1.35V output pin from the internal LDO. This is the shared output pin for both MLDO and the DC-DC converter
    • PMU_MLDO_OUT powers the LDO’s in the Wireless subsystem (BUCK_LPA, BUCK_MPA, BUCK_PLL, BUCK_BB and BUCK_CLDO)

For decoupling recommendations for the different power supplies, refer to the schematic checklist.