Device | Writing the OSCLOCK Fuse in FUSE.OSCCFG to
‘1’ Prevents Automatic Loading of Calibration Values | X |
AC | Coupling Through AC Pins | X |
AC Interrupt Flag Not Set Unless Interrupt is
Enabled | X |
False Triggers May Occur Under Certain
Conditions | X |
False Triggering When Sweeping Negative Input
of the AC When the Low-Power Mode is Disabled | X |
ADC | ADC Functionality Cannot be Ensured with
CLKADC Above 1.5 MHz and a Setting of 25% Duty Cycle | X |
Pending Event Stuck When Disabling the
ADC | X |
ADC Interrupt Flags Cleared When Reading
RESH | X |
Changing ADC Control Bits During Free-Running
Mode not Working | X |
One Extra Measurement Performed After
Disabling ADC Free-Running Mode | X |
ADC Wake-Up with WCMP | X |
CCL | Connecting LUTs in Linked Mode Requires OUTEN
Set to ‘1’ | X |
D-latch is Not Functional | X |
The CCL Must be Disabled to Change the Configuration of a Single LUT | X |
RTC | Any Write to the RTC.CTRLA Register Resets the
RTC and PIT Prescaler | X |
Disabling the RTC Stops the PIT | X |
TCA | Restart Will Reset Counter Direction in
NORMAL and FRQ Mode | X |
TCB | Minimum Event Duration Must Exceed the
Selected Clock Period | X |
The TCB Interrupt Flag is Cleared When Reading
CCMPH | X |
TCB Input Capture Frequency and Pulse-Width
Measurement Mode Not Working with Prescaled Clock | X |
The TCA Restart Command Does Not Force a
Restart of TCB | X |
CCMP and CNT Registers Operate as 16-Bit Registers in 8-Bit PWM Mode | X |
TCD | TCD Auto-Update Not Working | X |
TCD Event Output Lines May Give False
Events | X |
Asynchronous Input Events Not Working When TCD Counter Prescaler is Used | X |
Halting TCD and Wait for SW Restart Does Not
Work if Compare Value A is ‘0 ’ or Dual Slope Mode is Used | X |
TWI | TIMEOUT Bits in the TWI.MCTRLA Register are
Not Accessible | X |
TWI Smart Mode Gives Extra Clock Pulse | X |
TWI Master Mode Wrongly Detects the Start Bit
as a Stop Bit | X |
The TWI Master Enable Quick Command is Not
Accessible | X |
USART | TXD Pin Override Not Released When Disabling
the Transmitter | X |
Frame Error on a Previous Message May Cause
False Start Bit Detection | X |
Full Range Duty Cycle Not Supported When
Validating LIN Sync Field | X |
Open-Drain Mode Does Not Work When TXD is
Configured as Output | X |