32.14 Slow Clock Mode

The SMC is able to automatically apply a set of “Slow Clock mode” read/write waveforms when an internal signal driven by the Power Management Controller is asserted because MCK has been configured to a very slow clock rate (typically, 32 kHz). In this mode, the user-programmed waveforms are ignored and the Slow Clock mode waveforms are applied. This mode is provided to avoid reprogramming the User Interface with appropriate waveforms at very slow clock rates. When activated, Slow Clock mode is active on all chip selects.