10.5.1 Main Clock Control A
Name: | MCLKCTRLA |
Offset: | 0x00 |
Reset: | 0x00 |
Property: | Configuration Change Protection |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CLKOUT | CLKSEL[1:0] | ||||||||
Access | R/W | R | R | R | R | R | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – CLKOUT System Clock Out
When this bit is written to '1', the system clock is output to CLKOUT pin.
When the device is in a sleep mode, there is no clock output unless a peripheral is using the system clock.Bits 1:0 – CLKSEL[1:0] Clock Select
This bit field selects the source for the Main Clock (CLK_MAIN).
Value | Name | Description |
---|---|---|
0x0 | OSC20M | 16/20MHz internal oscillator |
0x1 | OSCULP32K | 32KHz internal Ultra Low Power oscillator |
0x2 | XOSC32K | 32.768kHz external crystal oscillator |
0x3 | EXTCLK | External clock |