1.7 CPLDs

The basic architecture of a CPLD is very similar to that of a PAL SPLD, but it has a much higher number of macrocells, and the architecture of the macrocell is more complex. Another trait that most CPLDs have is a wide, centralized interconnect bus that connects the various logic elements to each other and to the I/O pins. These features allow complex designs to be implemented within these devices while maintaining predictable timing characteristics.

Figure 1-4. Elementary CPLD Architecture