2.3 Start Condition

The I2C Specification defines a Start condition as the transition of the SDA line from an Idle state (logic high level) to an Active state (logic low level) while the SCL line is idle (see Figure 2-3). The Start condition is always initiated by the host and signifies the beginning of a transmission.

Figure 2-3. Start Condition
Note:
  1. See device data sheet for Start condition hold time parameters.
  2. SDA hold time are configured via the SDAHT[1:0] bits.

According to the I2C Specification, a bus collision cannot occur on a Start condition. The Bus Free (BFRE) bit is used by the module hardware to indicate the status of the bus. The Bus Free Time Selection (BFRET[1:0]) bits define the amount of I2C clock cycles that the host hardware must detect while the bus is idle before the BFRE bit is asserted. When the BFRE bit is set (BFRE = 1), the bus is considered in an Idle state, and a host device may issue a Start condition. If there is more than one host on the bus (Multi-Host mode), and both attempt to issue a Start condition simultaneously, a bus collision will occur during the addressing phase of communication.

When the host asserts a Start condition, the client hardware sets the Start Condition Interrupt Flag (SCIF), and if the Start Condition Interrupt Enable (SCIE) bit is set, the generic I2C Interrupt Flag (I2CxIF) bit is also set. The client software must clear SCIF in order to clear I2CxIF and continue normal operation.