20.3.1 Chip ID Register

Name: CHIPID_CIDR
Offset: 0x0
Reset: 0xA1XE0E0X with X defined by CIDR Reset Value
Property: Read-only

Bit 3130292827262524 
 EXTNVPTYP[2:0]ARCH[7:4] 
Access RRRRRRRR 
Reset 1010xxxx 
Bit 2322212019181716 
 ARCH[3:0]SRAMSIZ[3:0] 
Access RRRRRRRR 
Reset xxxx1110 
Bit 15141312111098 
 NVPSIZ2[3:0]NVPSIZ[3:0] 
Access RRRRRRRR 
Reset 00001110 
Bit 76543210 
 EPROC[2:0]VERSION[4:0] 
Access RRRRRRRR 
Reset 000xxxxx 

Bit 31 – EXT Extended CHIP ID Selection

ValueDescription
0 Reserved.
1 An extended Chip ID exists.

Bits 30:28 – NVPTYP[2:0] Non-volatile Program Memory Type

ValueNameDescription
0x00-0x01 - Reserved
0x02 FLASH Embedded Flash Memory
0x03-0x04 - Reserved

Bits 27:20 – ARCH[7:0] Architecture Identifier

ValueDescription
0x18 PIC32CZxxxxCA without Exposed Pad
0x19 Reserved
0x1A PIC32CZxxxxCA (TFBGA and TQFP with Exposed Pad)
0x1B PIC32CZxxxxMC

Bits 19:16 – SRAMSIZ[3:0] Internal SRAM Size

ValueNameDescription
0-14 - Reserved
15 512K 512 Kbytes

Bits 15:12 – NVPSIZ2[3:0] Second Non-Volatile Program Memory Size

ValueNameDescription
0 NONE None
1-15 - Reserved

Bits 11:8 – NVPSIZ[3:0] Non-Volatile Program Memory Size

ValueNameDescription
0-13 - Reserved
14 2048K 2048 Kbytes
15 - Reserved

Bits 7:5 – EPROC[2:0] Embedded Processor

ValueNameDescription
0 CM7 Cortex-M7
1-7 - Reserved

Bits 4:0 – VERSION[4:0] Version of the Device

Current version of the device.