10.1 General-Purpose I/O Lines

General-purpose I/O (GPIO) lines are managed by PIO Controllers. All I/Os have several input or output modes, such as pull up or pull down, input Schmitt triggers, multi-drive (open-drain), glitch filters, debouncing or input change interrupt. Programming of these modes is performed independently for each I/O line through the PIO controller user interface. For additional information, refer to the Parallel Input/Output Controller (PIO).

The input/output buffers of the PIO lines are supplied through VDDIO power supply rail.

The PIC32CZ CA70/MC70 devices embed high-speed pads capable of handling high-speed clocks for HSMCI, SPI and QSPI (MAIN_CLK2). Refer to the Electrical Characteristics for additional information. Typical pull-up and pull-down values are provided into the I/O Pin Electrical Specifications section in the Electrical Specifications 85°C chapter.

Each I/O line also embeds a DI_11 (On-die Serial Resistor), as shown in the following figure. It consists of an internal series resistor termination scheme for impedance matching between the driver output (PIC32CZ CA70/MC70) and the PCB trace impedance preventing signal reflection. The series resistor helps to reduce I/Os switching current (di/dt), thereby reducing in turn, EMI. It also decreases overshoot and undershoot (ringing) due to inductance of interconnect between devices or between boards. Finally, DI_11 helps diminish signal integrity issues. The following figure illustrates the On-Die Termination (ODT).