16.3.1 PORTE on 40/44-Pin Devices

For 40/44-pin devices, PORTE is a 4-bit wide port. Three pins (RE0, RE1 and RE2) are individually configurable as inputs or outputs. These pins have Schmitt Trigger input buffers. When selected as an analog input, these pins will read as ‘0’s.

The corresponding data direction register is TRISE. Setting a TRISE bit (= 1) will make the corresponding PORTE pin an input (i.e., disable the output driver). Clearing a TRISE bit (= 0) will make the corresponding PORTE pin an output (i.e., enable the output driver and put the contents of the output latch on the selected pin).

TRISE controls the direction of the REx pins, even when they are being used as analog pins. The user must make sure to keep the pins configured as inputs when using them as analog inputs. RE<2:0> bits have other registers associated with them (i.e., ANSELE, WPUE, INLVLE, SLRCONE and ODCONE). The functionality is similar to the other ports.

The Data Latch register (LATE) is also memory-mapped. Read-modify-write operations on the LATE register read and write the latched output value for PORTE.

Important: On a Power-on Reset, RE<2:0> are configured as analog inputs.

The fourth pin of PORTE (MCLR/VPP/RE3) is an input-only pin. Its operation is controlled by the MCLRE Configuration bit. When selected as a port pin (MCLRE = 0), it functions as a digital input-only pin; as such, it does not have TRIS or LAT bits associated with its operation. Otherwise, it functions as the device’s Master Clear input. In either configuration, RE3 also functions as the programming voltage input during programming.

RE3 in PORTE register is a read-only bit and will read ‘1’ when MCLRE = 1 (i.e., Master Clear enabled).

Important: On a Power-on Reset, RE3 is enabled as a digital input-only if Master Clear functionality is disabled.

EXAMPLE-2: Initializing PORTE

CLRF		PORTE		; Initialize PORTE by
				         ; clearing output
				         ; data latches
CLRF		LATE		 ; Alternate method
				         ; to clear output
				         ; data latches
CLRF		ANSELE	     ; Configure analog pins
				         ; for digital only
MOVLW		05h		 ; Value used to
				         ; initialize data
				         ; direction
MOVWF		TRISE	     ; Set RE<0> as input
				         ; RE<1> as output
				         ; RE<2> as input