16.1 DS60001747C - 01/2025
Changes |
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Updated Ordering Information, Figure 7-1, NAND Flash Memory, Ethernet PHY, Table 8-1 Added sections Design Resources, Particular Considerations Corrected number of FLEXCOMs in Interfacing in I²C/TWI Mode, Interfacing in UART Mode Corrected body overall dimensions in Table 13-1 |