7.2.1 PIOA Pin List

Table 7-1. PIOA Pin Description
Pad No.	Power Rail	I/O Type	Primary		Alternate		PIO Peripheral			Reset State	Note
Pad No.	Power Rail	I/O Type	Signal	Dir	Signal	Dir	Func	Signal	Dir	Signal, Dir, PU, PD, HiZ, ST, SEC, FILTER	Note
21	VDDIOP0	GPIO	PA0	I/O	–	–	A	FLEXCOM0_IO0	I/O	PIO, I, PU, ST	1, 3
22	VDDIOP0	GPIO	PA1	I/O	–	–	A	FLEXCOM0_IO1	I/O	PIO, I, PU, ST	1, 3
81	VDDIOP0	GPIO	PA2	I/O	WKUP1	–	B	SDMMC1_DAT1	I/O	PIO, I, PU, ST	2
82	VDDIOP0	GPIO	PA3	I/O	–	–	B	SDMMC1_DAT2	I/O	PIO, I, PU, ST	2
83	VDDIOP0	GPIO	PA4	I/O	–	–	B	SDMMC1_DAT3	I/O	PIO, I, PU, ST	2
73	VDDIOP0	GPIO	PA5	I/O	–	–	A	FLEXCOM1_IO0	I/O	PIO, I, PU, ST	–
73	VDDIOP0	GPIO	PA5	I/O	–	–	B	CANTX1	O	PIO, I, PU, ST	–
74	VDDIOP0	GPIO	PA6	I/O	–	–	A	FLEXCOM1_IO1	I/O	PIO, I, PU, ST	–
74	VDDIOP0	GPIO	PA6	I/O	–	–	B	CANRX1	I	PIO, I, PU, ST	–
32	VDDIOP0	GPIO	PA7	I/O	–	–	A	FLEXCOM2_IO0	I/O	PIO, I, PU, ST	–
							B	FLEXCOM4_IO4	O
							C	FLEXCOM5_IO4	O
33	VDDIOP0	GPIO	PA8	I/O	–	–	A	FLEXCOM2_IO1	I/O	PIO, I, PU, ST	–
							B	FLEXCOM5_IO3	I/O
							C	FLEXCOM4_IO5	O
142	VDDIOP0	GPIO	PA9	I/O	WKUP2	–	A	DRXD	I	PIO, I, PU, ST	–
142	VDDIOP0	GPIO	PA9	I/O	WKUP2	–	B	CANRX0	I	PIO, I, PU, ST	–
143	VDDIOP0	GPIO	PA10	I/O	WKUP3	–	A	DTXD	O	PIO, I, PU, ST	–
143	VDDIOP0	GPIO	PA10	I/O	WKUP3	–	B	CANTX0	O	PIO, I, PU, ST	–
144	VDDIOP0	GPIO	PA11	I/O	–	–	A	FLEXCOM4_IO1	I/O	PIO, I, PU, ST	–
144	VDDIOP0	GPIO	PA11	I/O	–	–	B	SDMMC1_DAT0	I/O	PIO, I, PU, ST	–
145	VDDIOP0	GPIO	PA12	I/O	–	–	A	FLEXCOM4_IO0	I/O	PIO, I, PU, ST	–
145	VDDIOP0	GPIO	PA12	I/O	–	–	B	SDMMC1_CMD	I/O	PIO, I, PU, ST	–
146	VDDIOP0	GPIO	PA13	I/O	–	–	A	FLEXCOM4_IO2	I/O	PIO, I, PU, ST	–
146	VDDIOP0	GPIO	PA13	I/O	–	–	B	SDMMC1_CK	I/O	PIO, I, PU, ST	–
147	VDDIOP0	GPIO	PA14	I/O	–	–	A	FLEXCOM4_IO3	I/O	PIO, I, PU, ST	–
91	VDDIOP0	GPIO	PA15	I/O	–	–	A	SDMMC0_DAT0	I/O	PIO, I, PU, ST	–
89	VDDIOP0	GPIO	PA16	I/O	–	–	A	SDMMC0_CMD	I/O	PIO, I, PU, ST	–
86	VDDIOP0	GPIO	PA17	I/O	–	–	A	SDMMC0_CK	I/O	PIO, I, PU, ST	–
88	VDDIOP0	GPIO	PA18	I/O	–	–	A	SDMMC0_DAT1	I/O	PIO, I, PU, ST	–
90	VDDIOP0	GPIO	PA19	I/O	–	–	A	SDMMC0_DAT2	I/O	PIO, I, PU, ST	–
87	VDDIOP0	GPIO	PA20	I/O	–	–	A	SDMMC0_DAT3	I/O	PIO, I, PU, ST	–
36	VDDIOP0	GPIO	PA21	I/O	–	–	A	TIOA0	I/O	PIO, I, PU, ST	–
36	VDDIOP0	GPIO	PA21	I/O	–	–	B	FLEXCOM5_IO1	I/O	PIO, I, PU, ST	–
35	VDDIOP0	GPIO	PA22	I/O	–	–	A	TIOA1	I/O	PIO, I, PU, ST	–
35	VDDIOP0	GPIO	PA22	I/O	–	–	B	FLEXCOM5_IO0	I/O	PIO, I, PU, ST	–
34	VDDIOP0	GPIO	PA23	I/O	–	–	A	TIOA2	I/O	PIO, I, PU, ST	–
34	VDDIOP0	GPIO	PA23	I/O	–	–	B	FLEXCOM5_IO2	I/O	PIO, I, PU, ST	–
45	VDDIOP0	GPIO	PA24	I/O	–	–	A	TCLK0	I	PIO, I, PU, ST	–
							B	TK	I/O
							C	CLASSD_L0	O
46	VDDIOP0	GPIO	PA25	I/O	–	–	A	TCLK1	I	PIO, I, PU, ST	–
							B	TF	I/O
							C	CLASSD_L1	O
47	VDDIOP0	GPIO	PA26	I/O	–	–	A	TCLK2	I	PIO, I, PU, ST	–
							B	TD	O
							C	CLASSD_L2	O
49	VDDIOP0	GPIO	PA27	I/O	–	–	A	TIOB0	I/O	PIO, I, PU, ST	–
							B	RD	I
							C	CLASSD_L3	O
50	VDDIOP0	GPIO	PA28	I/O	WKUP4	–	A	TIOB1	I/O	PIO, I, PU, ST	–
50	VDDIOP0	GPIO	PA28	I/O	WKUP4	–	B	RK	I/O	PIO, I, PU, ST	–
51	VDDIOP0	GPIO	PA29	I/O	–	–	A	TIOB2	I/O	PIO, I, PU, ST	–
							B	RF	I/O
							C	FLEXCOM2_IO7	I
80	VDDIOP0	GPIO	PA30	I/O	–	–	A	FLEXCOM6_IO0	I/O	PIO, I, PU, ST	2
80	VDDIOP0	GPIO	PA30	I/O	–	–	B	FLEXCOM5_IO6	O	PIO, I, PU, ST	2
79	VDDIOP0	GPIO	PA31	I/O	–	–	A	FLEXCOM6_IO1	I/O	PIO, I, PU, ST	2
79	VDDIOP0	GPIO	PA31	I/O	–	–	B	FLEXCOM5_IO5	O	PIO, I, PU, ST	2

Note:

Fixed feature due to the SAM9X60D1G-I/LZB internal connection.
Limited feature compared to SAM9X60D1G due to the use of a part of the functionality for other features in the SAM9X60D1G-I/LZB, for example GMAC or FLEXCOM.
The signal is internally pulled up with a 4.7 kΩ resistor.