7.2.2 PIOB Pin List

Table 7-2. PIOB Pin Description
Pad No.

Power
Rail

I/O Type

Primary

Alternate

PIO Peripheral

Reset State

Note
SignalDirSignalDirFuncSignalDir

Signal, Dir,
PU, PD,
HiZ, ST,
SEC,
FILTER

--VDDANAGPIOPB0I/O––AE0_RX0IPIO, I, PU, ST1
--VDDANAGPIOPB1I/O––AE0_RX1IPIO, I, PU, ST1
--VDDANAGPIOPB2I/O––AE0_RXERIPIO, I, PU, ST1
--VDDANAGPIOPB3I/O––AE0_RXDVIPIO, I, PU, ST1
--VDDANAGPIOPB4I/O––AE0_TXCKI/OPIO, I, PU, ST1
--VDDANAGPIOPB5I/O––AE0_MDIOI/OPIO, I, PU, ST1
--VDDANAGPIOPB6I/O––AE0_MDCOPIO, I, PU, ST1
--VDDANAGPIOPB7I/O––AE0_TXENOPIO, I, PU, ST1
--VDDANAGPIOPB8I/O––––IPIO, I, PU, ST1
--VDDANAGPIOPB9I/O––AE0_TX0OPIO, I, PU, ST1
--VDDANAGPIOPB10I/O––AE0_TX1OPIO, I, PU, ST1
150VDDANAGPIOPB11I/OAD0–BPWM0OPIO, I, PU, ST2
151VDDANAGPIOPB12I/OAD1–BPWM1OPIO, I, PU, ST2
65VDDANAGPIOPB13I/OAD2–BPWM2OPIO, I, PU, ST2
84VDDANAGPIOPB14I/OAD3–BPWM3OPIO, I, PU, ST2
–VDDANAGPIOPB15I/OAD4––––PIO, I, PU, ST2
24VDDANAGPIOPB16I/OAD5––––PIO, I, PU, ST2
72VDDANAGPIOPB17I/OAD6––––PIO, I, PU, ST2
148VDDANAGPIOPB18I/OWKUP7–AIRQIPIO, I, PU, ST–
BADTRGI
64VDDQSPIGPIOPB19I/O––AQSCKOPIO, I, PU, ST–
BI2SMCC_CKI/O
CFLEXCOM11_IO0I/O
60VDDQSPIGPIOPB20I/O––AQCSOPIO, I, PU, ST–
BI2SMCC_WSI/O
CFLEXCOM11_IO1I/O
61VDDQSPIGPIOPB21I/O––AQIO0I/OPIO, I, PU, ST–
BI2SMCC_DIN0I
CFLEXCOM12_IO0I/O
62VDDQSPIGPIOPB22I/O––AQIO1I/OPIO, I, PU, ST–
BI2SMCC_DOUT0O
CFLEXCOM12_IO1I/O
63VDDQSPIGPIOPB23I/O––AQIO2I/OPIO, I, PU, ST–
BI2SMCC_MCKO
59VDDQSPIGPIOPB24I/O––AQIO3I/OPIO, I, PU, ST–
26VDDIOP0GPIOPB25I/OWKUP8–ANRST_OUTONRST_OUT, O, PD–
BNTRSTI
Note:
  1. Fixed feature due to the SAM9X60D1G-I/LZB internal connection.
  2. Limited feature compared to SAM9X60D1G due to the use of a part of the functionality for other features in the SAM9X60D1G-I/LZB, for example GMAC or FLEXCOM.