2.5.2 LVDS

Low-Voltage Differential Signal (LVDS) (ANSI/TIA/EIA-644) is a high-speed, differential I/O standard. It requires that one data bit is carried through two signal lines, so two pins are needed. It also requires an external resistor termination. The voltage swing between these two signal lines is approximately 350 mV.

Figure 2-26. LVDS Board-Level Implementation

The LVDS circuit consists of a differential driver connected to a terminated receiver through a constant-impedance transmission line. The receiver is a wide-common-mode-range differential amplifier. The common-mode range is from 0.2V to 2.2V for a differential input with 400 mV swing.

To implement the driver for the LVDS circuit, drivers from two adjacent I/O cells are used to generate the differential signals (note that the driver is not a current-mode driver). This driver provides a nominal constant current of 3.5 mA. When this current flows through a 100Ω termination resistor on the receiver side, a voltage swing of 350 mV is developed across the resistor. The direction of the current flow is controlled by the data fed to the driver.

An external-resistor network (three resistors) is needed to reduce the voltage swing to about 350 mV. Therefore, four external resistors are required, three for the driver and one for the receiver.

The following table lists the DC input and output levels of LVDS.

Table 2-60. DC Input and Output Levels
DC Parameter	Description	Min.	Typ.	Max.	Units
VCCI¹	Supply voltage	2.375	2.5	2.625	V
VOH	Output high voltage	1.25	1.425	1.6	V
VOL	Output low voltage	0.9	1.075	1.25	V
VODIFF	Differential output voltage	250	350	450	mV
VOCM	Output common mode voltage	1.125	1.25	1.375	V
VICM2	Input common mode voltage	0.2	1.25	2.2	V

Note:

±5%
Differential input voltage = ±350 mV.

The following table lists the AC loading values.

Table 2-61. AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)	Input High (V)	Measuring Point¹ (V)
1.2 – 0.125	1.2 + 0.125	1.2

Note:

Measuring Point = VTRIP