27.4.2.2 Peripheral Functions Multiplexing

Each I/O pin can be controlled either by the registers in PORT or by a peripheral, as shown in the following figure.

Figure 27-9. Overview of the Peripheral Functions Multiplexing

The Peripheral Multiplexer Enable bit in the Pin Configuration registers (PINCFG[n].PMUXEN) can be written to ‘1’ to enable the connection between peripheral functions and individual I/O pins. This overrides the connection between the PORT and that I/O pin, connecting the selected peripheral signal to the particular I/O pin instead of the PORT line bundle.

The Peripheral Multiplexing registers (PMUX[m]) select the peripheral function for the corresponding pins. Each register controls the peripheral multiplexing for two pins, through the Peripheral Multiplexing for Odd-Numbered Pin (PMUXO) and Peripheral Multiplexing for Even-Numbered Pin (PMUXE) bit fields. For example, PA0 is configured in PMUX[0].PMUXE, and PA5 is configured in PMUX[2].PMUXO.

Each Peripheral Multiplexing bit field can be configured to peripheral functions A through J. Refer to the Pinout section for details on the functions each pin can connect to.

Note: The chosen peripheral must be configured and enabled.