21.8.5 Interrupt Flag Status and Clear


Bit	15	14	13	12	11	10	9	8
	OVF							ALARM0
Access	R/W							R/W
Reset	0							0


Bit	7	6	5	4	3	2	1	0
	PER7	PER6	PER5	PER4	PER3	PER2	PER1	PER0
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bit 15 – OVF Overflow

This flag is cleared by writing a ‘1’ to it.

This flag is set on the next CLK_RTC_CNT cycle after an overflow condition occurs and will generate an interrupt if INTENCLR/SET.OVF is ‘1’.

Writing a ‘0’ to this bit has no effect.

Writing a ‘1’ to this bit will clear the Overflow interrupt flag.

Bit 8 – ALARMn Alarm n

This flag is cleared by writing a ‘1’ to it.

This flag is set on the next CLK_RTC_CNT cycle after a match with the compare condition and will generate an interrupt if INTENCLR/SET.ALARMn is ‘1’.

Writing a ‘0’ to this bit has no effect.

Writing a ‘1’ to this bit will clear the Alarm n interrupt flag.

Bits 0, 1, 2, 3, 4, 5, 6, 7 – PERn Periodic Interval n

This flag is cleared by writing a ‘1’ to it.

This flag is set on the 0-to-1 transition of prescaler bit (n+2) and will generate an interrupt if INTENCLR/SET.PERn is ‘1’.

Writing a ‘0’ to this bit has no effect.

Writing a ‘1’ to this bit will clear the Periodic Interval n interrupt flag.

Name:	INTFLAG
Offset:	0x0C
Reset:	0x0000
Property:	–