1.2 Data Selection

The CLC module has several possible input signal selections. They are a combination of:

• I/O Pins
• Peripherals
• Internal Clocks
• Register bits

Data selection is done through four multiplexers; each multiplexer can have up to 32 inputs. The output of each of these multiplexers acts as an input to one of eight selectable single output logic functions. The CLC input signals are selected using the four registers CLCSEL0 through CLCSEL3.