13.2.6.2 Debug Architecture

The figure below illustrates the debug architecture. The Cortex-M4F embeds four functional units for debug:

• SWJ-DP (Serial Wire/JTAG Debug Port)
• FPB (Flash Patch Breakpoint)
• DWT (Data Watchpoint and Trace)
• ITM (Instrumentation Trace Macrocell)
• TPIU (Trace Port Interface Unit)

The information that follows is mainly dedicated to developers of SWJ-DP Emulators/Probes and debugging tool vendors for Cortex-M4 based microcontrollers. For further details on SWJ-DP, see the Cortex-M4 technical reference manual.