32.4.6 Register Write Protection

To prevent any single software error from corrupting PDC behavior, certain registers in the address space can be write-protected by setting the WPPTREN,WPCTREN, WPCREN bits in the Write Protection Mode register (PERIPH_PWPMR). There is one write protection mode register per PDC channel,

The following registers can be write-protected when WPPTREN=1:

• Receive Pointer Register
• Transmit Pointer Register
• Receive Next Pointer Register
• Transmit Next Pointer Register

The following registers can be write-protected when WPCTREN=1:

• Receive Counter Register
• Transmit Counter Register
• Receive Next Counter Register
• Transmit Next Counter Register

The following registers can be write-protected when WPCREN=1:

• Transfer Control Register