38.6.24 ADC Analog Control Register

This register can only be written if the WPEN bit is cleared in the ADC Write Protection Mode Register.

By default, bits 12 and 13 are set to 1 and 0, respectively, and must not be modified.

Name: ADC_ACR
Offset: 0xE0
Reset: 0x00001100
Property: Read/Write

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
  SMVTSMENINTVREFEN     
Access R/WR/WR/W 
Reset 000 
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
      ZBAT   
Access R/W 
Reset 0 

Bit 22 – SMVT Supply Monitor Voltage Threshold

ValueDescription
0 Voltage threshold is in low range. Refer to the section “Electrical Characteristics”.
1 Voltage threshold is in high range. Refer to the section “Electrical Characteristics”.

Bit 21 – SMEN Supply Monitor Enable

ValueDescription
0 Disables the supply monitor.
1 Enables both the voltage reference and the supply monitor.

Bit 20 – INTVREFEN ADC Internal Positive Voltage Reference Enable

ValueDescription
0 Disables the internal positive voltage reference for the ADC conversions (the VREFP pin can be externally driven).
1 Enables the internal positive reference voltage for the ADC conversions (a capacitor can be connected to the VREFP pin).

Bit 2 – ZBAT VBAT Resistive Load Selection

There is no internal load on VBAT when the VBAT channel is not selected for conversion (only leakage current).
ValueDescription
0 Selects the high value of the resistive load only attached on VBAT when the channel is selected for conversion. Refer to the section “Electrical Characteristics” for further details.
1 Selects the low value of the resistive load only attached on VBAT when the channel is selected for conversion.