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Second-Generation Smart Energy Platform Solution including Integrated Metrology, Dual Arm® Cortex®-M4F Cores, Security and LCD Controller
Second-Generation Smart Energy Platform Solution including Integrated Metrology, Dual Arm® Cortex®-M4F Cores, Security and LCD Controller
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PIC32CX1025MTSH PIC32CX2051MTSH PIC32CX5112MTSH
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  2. 49 Universal Asynchronous Receiver Transmitter (UART)
  3. 49.5 Functional Description
  4. 49.5.8 Register Write Protection
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  • Description
  • Features
  • 1 Block Diagram
  • 2 Configuration Summary
  • 3 Package and Pinout
  • 4 Power Supply and Power Control
  • 5 Input/Output Lines
  • 6 Core and Interconnect
  • 7 Product Mapping and Peripheral Access
  • 8 Memories
  • 9 Safety and Security Features
  • 10 Real-Time Event Management
  • 11 Peripherals
  • 12 Cortex-M4 Processor (Arm)
  • 13 Flash Programming, Debug and Test Features
  • 14 ROM Code and Boot Strategies
  • 15 Supply Controller (SUPC)
  • 16 Reset Controller (RSTC)
  • 17 System Controller Write Protection (SYSCWP)
  • 18 Dual Watchdog Timer (DWDT)
  • 19 Clock Generator
  • 20 Power Management Controller (PMC)
  • 21 Parallel Input/Output Controller (PIO)
  • 22 Real-Time Clock (RTC)
  • 23 Real-time Timer (RTT)
  • 24 General Purpose Backup Registers (GPBR)
  • 25 Special Function Registers (SFR)
  • 26 Special Function Registers Backup (SFRBU)
  • 27 Bus Matrix (MATRIX)
  • 28 Chip Identifier (CHIPID)
  • 29 Secure Embedded Flash Controller (SEFC)
  • 30 Interprocessor Communication (IPC)
  • 31 Memory to Memory (MEM2MEM)
  • 32 Peripheral DMA Controller (PDC)
  • 33 Cortex-M Cache Controller (CMCC)
  • 34 Flexible Serial Communication Controller (FLEXCOM)
  • 35 Quad Serial Peripheral Interface (QSPI)
  • 36 Segment LCD Controller (SLCDC)
  • 37 Timer Counter (TC)
  • 38 Analog-to-Digital Converter (ADC) Controller
  • 39 Analog Comparator Controller (ACC)
  • 40 Advanced Encryption Standard (AES)
  • 41 Advanced Encryption Standard Bridge (AESB)
  • 42 Secure Hash Algorithm (SHA)
  • 43 True Random Number Generator (TRNG)
  • 44 Integrity Check Monitor (ICM)
  • 45 Classical Public Key Cryptography Controller (CPKCC)
  • 46 Energy Metering Analog Front End (EMAFE)
  • 47 Multi Channel Serial Peripheral Interface (MCSPI)
  • 48 Pulse Width Modulation Controller (PWM)
  • 49 Universal Asynchronous Receiver Transmitter (UART)
    • 49.1 Description
    • 49.2 Embedded Characteristics
    • 49.3 Block Diagram
    • 49.4 Product Dependencies
    • 49.5 Functional Description
      • 49.5.1 Baud Rate Generator
      • 49.5.2 Receiver
      • 49.5.3 Transmitter
      • 49.5.4 Analog Comparator Control
      • 49.5.5 Optical Interface
      • 49.5.6 Peripheral DMA Controller (PDC)
      • 49.5.7 Comparison Function on Received Character
      • 49.5.8 Register Write Protection
      • 49.5.9 Test Modes
    • 49.6 Register Summary
  • 50 Electrical Characteristics
  • 51 Mechanical Characteristics
  • 52 Marking
  • 53 Ordering Information
  • 54 Revision History
  • 55 Product Identification System
  • Microchip Information

49.5.8 Register Write Protection

To prevent any single software error from corrupting UART behavior, certain registers in the address space can be write-protected by setting the WPEN bit in the UART Write Protection Mode Register (UART_WPMR).

The following registers can be write-protected:

  • UART Mode Register
  • UART Baud Rate Generator Register
  • UART Comparison Register
  • UART Receiver Time-out Register

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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