18.4.7 Watchdog Halt

The counters may be stopped depending on the value programmed for the bits:

WDTx_MR.WDIDLEHLT: If high, the corresponding watchdog counter is stopped while Core 0 is in Sleep mode.
WDT0_MR.WDDBGxHLT, WDT1_MR.WDDBGxHLT: If high, the corresponding watchdog counter is stopped while Core x is in Debug state.

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