7.2.2 PIOB Pin List

Table 7-2. PIOB Pin Description
Pad No.Power RailI/O TypePrimaryAlternate SignalPIO PeripheralReset State(1)Note
SignalTypeFuncSignalIO SetSignal, Dir, PU, PD, HiZ, ST
–VDD_3V3GPIOPB0GPIO–AGRX21PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB1GPIO–AGRX31PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB2GPIO–AG125CK1PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB3GPIO–AGCRSDV/GRXCTL1PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB4GPIO–AGTX21PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB5GPIO–AGTX31PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB6GPIO–AGTXCK/GREFCK1PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB7GPIO–AGTXEN/GTXCTL1PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB8GPIO–AGRXCK1PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB9GPIO–AGMDIO1PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB10GPIO–AGMDC1PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB11GPIO–AGRX01PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB12GPIO–AGRX11PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB13GPIO–AGTX01PIO, I, PU, STUsed for Gigabit Ethernet(2)
–VDD_3V3GPIOPB14GPIO–AGTX11PIO, I, PU, STUsed for Gigabit Ethernet(2)
23VDD_3V3GPIOPB15GPIO–CFLEXCOM11_IO01PIO, I, PU, ST(3)
DI2SMCC_WS1
25VDD_3V3GPIOPB16GPIO–CFLEXCOM11_IO11PIO, I, PU, ST(3)
DI2SMCC_DIN01
26VDD_3V3GPIOPB17GPIO–CFLEXCOM12_IO01PIO, I, PU, ST(3)
DI2SMCC_DOUT01
27VDD_3V3GPIOPB18GPIOWKUP7BADTRG1PIO, I, PU, ST(3)
CFLEXCOM12_IO11
DIRQ1
–VDD_3V3GPIOPB19GPIO–AQSCK1PIO, I, PU, STUsed for QSPI memory(2)
20VDD_3V3GPIOPB20GPIO–AQCS1PIO, I, PU, STUsed for QSPI memory(2)
–VDD_3V3GPIOPB21GPIO–AQIO01PIO, I, PU, STUsed for QSPI memory(2)
–VDD_3V3GPIOPB22GPIO–AQIO11PIO, I, PU, STUsed for QSPI memory(2)
–VDD_3V3GPIOPB23GPIO–AQIO21PIO, I, PU, STUsed for QSPI memory(2)
–VDD_3V3GPIOPB24GPIO–AQIO31PIO, I, PU, STUsed for QSPI memory(2)
24VDD_3V3GPIOPB25GPIOWKUP8DI2SMCC_MCK1PIO, I, PU, ST(3)
28VDD_3V3GPIOPB26GPIO–DI2SMCC_CK1PIO, I, PU, ST(3)
Note:
  1. Signal = ‘PIO’ if GPIO; Dir = Direction; PU = Pull-up; PD = Pull-down; HiZ = High impedance; ST = Schmitt Trigger.
  2. This feature is fixed due to the SAM9X75 SOM Series internal connection.
  3. Compared to SAM9X75 SiP, this feature is limited, as it is partly used for other SAM9X75 SOM Series features, for example GMAC or FLEXCOM.