19.8.5 3.3V Brown-Out Detector (BOD33) Control


Bit	31	30	29	28	27	26	25	24
	VBATLEVEL[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	LEVEL[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	x	x	x	x	x	x


Bit	15	14	13	12	11	10	9	8
		PSEL[2:0]			HYST[3:0]
Access		R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset		0	0	0	x	x	x	x


Bit	7	6	5	4	3	2	1	0
	RUNBKUP	RUNHIB	RUNSTDBY	STDBYCFG	ACTION[1:0]		ENABLE
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	y	y	z

Bits 31:24 – VBATLEVEL[7:0] BOD33 Threshold Level on VBAT

This field sets the triggering voltage threshold for the BOD33 when the BOD33 monitors VBAT in battery backup sleep mode.

This field is not synchronized.

Bits 23:16 – LEVEL[7:0] BOD33 Threshold Level on VDD

This field sets the triggering voltage threshold for the BOD33 when the BOD33 monitors VDD. If an hysteresis value is programmed (BOD33.HYST), this field corresponds to the lower threshold (V_BOD-).

These bits are loaded from NVM User Row at start-up.

This field is not synchronized.

The VBOD- input voltage can be calculated as follows: VBOD- = 1.5 + LEVEL[7:0) x VBOD33_{LEVEL_STEP}

And the upper threshold (VBOD+) is then: VBOD+ = VBOD- + N x VBOD33_{HYST_STEP}, With N=0 to 15 according to HYST[3:0] value and VBOD33_{HYST_STEP} = VBOD33_{LEVEL_STEP}, (refer to Bits 11:8 – HYST[3:0]: BOD33 Hysteresis voltage value on VDD).

If a hysteresis value is programmed, the following equation must be respected to avoid any overflow on VBOD33(max):

LEVEL[7:0] value < 255 - HYST[3:0] value.

Bits 14:12 – PSEL[2:0] Prescaler Select

Selects the prescaler divide-by output for the BOD33 sampling mode available in hibernate, backup or battery backup mode. The input clock comes from the OSCULP32K 32.768 kHz output.

Value	Name	Description
0x0	NODIV	Not divided: Sampling mode is OFF.
0x1	DIV4	Divide clock by 4
0x2	DIV8	Divide clock by 8
0x3	DIV16	Divide clock by 16
0x4	DIV32	Divide clock by 32
0x5	DIV64	Divide clock by 64
0x6	DIV128	Divide clock by 128
0x7	DIV256	Divide clock by 256

Bits 11:8 – HYST[3:0] BOD33 Hysteresis Voltage Value on V_DD

This field sets the hysteresis voltage value related to "BOD33 Threshold Level on VDD" field when the BOD33 monitors VDD.

These bits are loaded from NVM User Row at start-up.

This field is not synchronized.

Value	Description
0	No hysteresis.
N	Hysteresis value is set to N*HYST_STEP. See the Electrical Characteristics section for the HYST_STEP voltage level.

Bit 7 – RUNBKUP BOD33 Configuration in Backup Sleep Mode

This field is not synchronized.

Value	Description
0	In backup sleep mode, the BOD33 is disabled.
1	In backup sleep mode, the BOD33 is enabled and configured in sampling mode.

Bit 6 – RUNHIB BOD33 Configuration in Hibernate Sleep Mode

This field is not synchronized.

Value	Description
0	In hibernate sleep mode, the BOD33 is disabled.
1	In hibernate sleep mode, the BOD33 is enabled and configured in sampling mode.

Bit 5 – RUNSTDBY Run in Standby

This bit is not synchronized.

Value	Description
0	In standby sleep mode, the BOD33 is disabled.
1	In standby sleep mode, the BOD33 is enabled.

Bit 4 – STDBYCFG BOD33 Configuration in Standby Sleep Mode

If the RUNSTDBY bit is set to '1', the STDBYCFG bit sets the BOD33 configuration in standby sleep mode.

This field is not synchronized.

Value	Description
0	In standby sleep mode, the BOD33 is enabled and configured in normal mode.
1	In standby sleep mode, the BOD33 is enabled and configured in low power mode.

Bits 3:2 – ACTION[1:0] BOD33 Action

These bits are used to select the BOD33 action when the supply voltage crosses below the BOD33 threshold.

These bits are loaded from NVM User Row at start-up.

This field is not synchronized.


Value	Name	Description
0x0	NONE	No action
0x1	RESET	The BOD33 generates a reset
0x2	INT	The BOD33 generates an interrupt
0x3	BKUP	The BOD33 puts the device in battery backup sleep mode.