29.8.5 RTC Clock Selection Control
| Name: | RTCCTRL |
| Offset: | 0x10 |
| Reset: | 0x00 |
| Property: | PAC Write-Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RTCSEL[2:0] | |||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bits 2:0 – RTCSEL[2:0] RTC Clock Selection
| Value | Name | Description |
|---|---|---|
| 0x0 | ULP1K | 1.024 kHz from 32 KHz internal ULP oscillator |
| 0x1 | ULP32K | 32.768 kHz from 32 KHz internal ULP oscillator |
| 0x2, 0x3 | Reserved | - |
| 0x4 | XOSC1K | 1.024 kHz from 32 KHz external oscillator |
| 0x5 | XOSC32K | 32.768 kHz from 32 KHz external crystal oscillator |
| 0x6 | Reserved | - |
| 0x7 | Reserved | - |