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32-bit Arm® Cortex®-M4F MCUs with 1 Msps 12-bit ADC, QSPI, USB, Ethernet, and PTC

ATSAMD51G18A ATSAMD51G19A ATSAMD51J18A ATSAMD51J19A ATSAMD51J20A ATSAMD51N19A ATSAMD51N20A ATSAMD51P19A ATSAMD51P20A ATSAME51G18A ATSAME51G19A ATSAME51J18A ATSAME51J19A ATSAME51J20A ATSAME51N19A ATSAME51N20A ATSAME53J18A ATSAME53J19A ATSAME53J20A ATSAME53N19A ATSAME53N20A ATSAME54N19A ATSAME54N20A ATSAME54P19A ATSAME54P20A

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40 SD/MMC Host Controller (SDHC)
40.8 Register Description

Features
1 Configuration Summary
2 Ordering Information
3 Block Diagram
4 Pinout
5 Signal Descriptions List
6 I/O Multiplexing and Considerations
7 Power Supply and Start-Up Considerations
8 Product Memory Mapping Overview
9 Memories
10 Processor and Architecture
11 CMCC - Cortex M Cache Controller
12 DSU - Device Service Unit
13 Clock System
14 GCLK - Generic Clock Controller
15 MCLK – Main Clock
16 RSTC – Reset Controller
17 RAMECC – RAM Error Correction Code (ECC)
18 PM – Power Manager
19 SUPC – Supply Controller
20 WDT – Watchdog Timer
21 RTC – Real-Time Counter
22 DMAC – Direct Memory Access Controller
23 EIC – External Interrupt Controller
24 GMAC - Ethernet MAC
25 NVMCTRL – Nonvolatile Memory Controller
26 ICM - Integrity Check Monitor
27 PAC - Peripheral Access Controller
28 OSCCTRL – Oscillators Controller
29 OSC32KCTRL – 32KHz Oscillators Controller
30 FREQM – Frequency Meter
31 Event System (EVSYS)
32 PORT - I/O Pin Controller
33 SERCOM – Serial Communication Interface
34 SERCOM USART - SERCOM Synchronous and Asynchronous Receiver and Transmitter
35 SERCOM SPI – SERCOM Serial Peripheral Interface
36 SERCOM I²C – Inter-Integrated Circuit
37 QSPI - Quad Serial Peripheral Interface
38 USB – Universal Serial Bus
39 CAN - Control Area Network
40 SD/MMC Host Controller (SDHC)
- 40.1 Overview
- 40.2 Features
- 40.3 Block Diagrams
- 40.4 Signal Description
- 40.5 Product Dependencies
- 40.6 Functional Description
- 40.7 Register Summary
- 40.8 Register Description
  - 40.8.1 SDMA System Address / Argument 2 Register
    SDMA System Address / Argument 2 Register
  - 40.8.2 Block Size Register
    Block Size Register
  - 40.8.3 Block Count Register
    Block Count Register
  - 40.8.4 Argument 1 Register
    Argument 1 Register
  - 40.8.5 Transfer Mode Register
    Transfer Mode Register
  - 40.8.6 Command Register
    Command Register
  - 40.8.7 Response Register n
    Response Register n
  - 40.8.8 Buffer Data Port Register
    Buffer Data Port Register
  - 40.8.9 Present State Register
    Present State Register
  - 40.8.10 Host Control 1 Register
    Host Control 1 Register
  - 40.8.11 Power Control Register
    Power Control Register
  - 40.8.12 Block Gap Control Register
    Block Gap Control Register
  - 40.8.13 Wakeup Control Register: SD/SDIO
    Wakeup Control Register: SD/SDIO
  - 40.8.14 Clock Control Register
    Clock Control Register
  - 40.8.15 Timeout Control Register
    Timeout Control Register
  - 40.8.16 Software Reset Register
    Software Reset Register
  - 40.8.17 Normal Interrupt Status Register
    Normal Interrupt Status Register
  - 40.8.18 Error Interrupt Status Register
    Error Interrupt Status Register
  - 40.8.19 Normal Interrupt Status Enable Register: e.MMC
    Normal Interrupt Status Enable Register: e.MMC
  - 40.8.20 Error Interrupt Status Enable Register
    Error Interrupt Status Enable Register
  - 40.8.21 Normal Interrupt Signal Enable Register
    Normal Interrupt Signal Enable Register
  - 40.8.22 Error Interrupt Signal Enable Register
    Error Interrupt Signal Enable Register
  - 40.8.23 Auto CMD Error Status Register
    Auto CMD Error Status Register
  - 40.8.24 Host Control 2 Register: e.MMC
    Host Control 2 Register: e.MMC
  - 40.8.25 Host Control 2 Register: SD/SDIO
    Host Control 2 Register: SD/SDIO
  - 40.8.26 Capabilities 0 Register
    Capabilities 0 Register
  - 40.8.27 Capabilities 1 Register
    Capabilities 1 Register
  - 40.8.28 Maximum Current Capabilities Register
    Maximum Current Capabilities Register
  - 40.8.29 Force Event Register for Auto CMD Error Status
    Force Event Register for Auto CMD Error Status
  - 40.8.30 Force Event Register for Error Interrupt Status
    Force Event Register for Error Interrupt Status
  - 40.8.31 ADMA Error Status Register
    ADMA Error Status Register
  - 40.8.32 ADMA System Address Register
    ADMA System Address Register
  - 40.8.33 Preset Value Register
    Preset Value Register
  - 40.8.34 Slot Interrupt Status Register
    Slot Interrupt Status Register
  - 40.8.35 Host Controller Version Register
    Host Controller Version Register
  - 40.8.36 Additional Present State Register
    Additional Present State Register
  - 40.8.37 e.MMC Control 1 Register
    e.MMC Control 1 Register
  - 40.8.38 e.MMC Control 2 Register
    e.MMC Control 2 Register
  - 40.8.39 AHB Control Register
    AHB Control Register
  - 40.8.40 Clock Control 2 Register
    Clock Control 2 Register
  - 40.8.41 Capabilities Control Register
    Capabilities Control Register
  - 40.8.42 Debug Register
    Debug Register
41 Configurable Custom Logic (CCL)
42 AES – Advanced Encryption Standard
43 Public Key Cryptography Controller (PUKCC)
44 TRNG – True Random Number Generator
45 ADC – Analog-to-Digital Converter
46 AC – Analog Comparators
47 DAC – Digital-to-Analog Converter
48 Timer/Counter (TC)
49 TCC – Timer/Counter for Control Applications
50 PTC - Peripheral Touch Controller
51 Inter-IC (I² S) Sound Controller
52 PCC - Parallel Capture Controller
53 PDEC – Position Decoder
54 Electrical Characteristics at 85°C
55 Electrical Characteristics at 105°C
56 Electrical Characteristics at 125°C
57 AEC Q-100 Grade 1, 125°C Electrical Characteristics
58 Appendix A
59 Packaging Information
60 Schematic Checklist
61 Conventions
62 Acronyms and Abbreviations
63 Product Identification System
64 Revision History
Microchip Information

40.8 Register Description

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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