29.2 I2C Mode Overview

The Inter-Integrated Circuit (I2C) bus is a multi-host serial data communication bus. Devices communicate in a host/client environment where the host devices initiate the communication. A client device is controlled through addressing. Figure 29-9 and Figure 29-10 show block diagrams of the I2C Host and Client modes, respectively.

Figure 29-9. MSSP Block Diagram (I2C Host Mode)
Figure 29-10. MSSP Block Diagram (I2C Client Mode)

The I2C bus specifies two signal connections:

  • Serial Clock (SCL)
  • Serial Data (SDA)

Both the SCL and SDA connections are bidirectional open-drain lines, each requiring pull-up resistors for the supply voltage. Pulling the line to ground is considered a logical zero and letting the line float is considered a logical one.

Figure 29-11 shows a typical connection between two processors configured as host and client devices.

Figure 29-11. I2C Host/Client Connection

The I2C bus can operate with one or more host devices and one or more client devices.

There are four potential modes of operation for a given device:

  • Host Transmit mode (host is transmitting data to a client)
  • Host Receive mode (host is receiving data from a client)
  • Client Transmit mode (client is transmitting data to a host)
  • Client Receive mode (client is receiving data from the host)
To begin communication, the host device transmits a Start condition followed by the address byte of the client it intends to communicate with. A Start condition is indicated by a high-to-low transition of the SDA line while the SCL line is held high. Address and data bytes are sent out, MSb first. This is followed by a single Read/Write Information (R/W) bit, which determines whether the host intends to transmit to or receive data from the client device. The R/W bit is sent out as a logical one when the host intends to read data from the client, and is sent out as a logical zero when it intends to write data to the client.

If the requested client exists on the bus, it will respond with an Acknowledge sequence, otherwise known as an ACK. The Acknowledge sequence is an active-low signal, which holds the SDA line low to indicate to the transmitter that the client device has received the transmitted data and is ready to receive more. The host then continues to either transmit to or receive data from the client.

The transition of a data bit is always performed while the SCL line is held low. Transitions that occur while the SCL line is held high are used to indicate Start and Stop conditions.

If the host intends to write to the client, then it repeatedly sends out a byte of data, with the client responding after each byte with an ACK sequence. In this example, the host device is in Host Transmit mode and the client is in Client Receive mode.

If the host intends to read from the client, then it repeatedly receives a byte of data from the client, and responds after each byte with an ACK sequence. In this example, the host device is in Host Receive mode and the client is in Client Transmit mode.

On the last byte of data communicated, the host device may end the transmission by sending a Stop condition. If the host device is in Receive mode, it sends the Stop condition in place of the last ACK sequence. A Stop condition is indicated by a low-to-high transition of the SDA line while the SCL line is held high.

In some cases, the host may want to maintain control of the bus and re-initiate another transmission. If so, the host device may send a Restart condition in place of the Stop condition or last ACK sequence when it is in Receive mode.

The I2C bus specifies three message protocols:

  • Single message where a host writes data to a client.
  • Single message where a host reads data from a client.
  • Combined message where a host initiates a minimum of two writes, or two reads, or a combination of writes and reads, to one or more clients.