20.13.3 TxCLK
Name: | TxCLK |
Offset: | 0x0291,0x0297 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CS[4:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
Bits 4:0 – CS[4:0] Timer Clock Source Selection
CS | Clock Source | |
---|---|---|
Timer1 | Timer3 | |
11111-10001 | Reserved | |
10000 | CLC4_OUT | |
01111 | CLC3_OUT | |
01110 | CLC2_OUT | |
01101 | CLC1_OUT | |
01100 | TMR3_overflow | Reserved |
01011 | Reserved | TMR1_overflow |
01010 | TMR0_overflow | |
01001 | EXTOSC | |
01000 | SOSC | |
00111 | MFINTOSC (32 kHz) | |
00110 | MFINTOSC (500 kHz) | |
00101 | SFINTOSC (1 MHz) | |
00100 | LFINTOSC | |
00011 | HFINTOSC | |
00010 | FOSC | |
00001 | FOSC/4 | |
00000 | Pin selected by T1CKIPPS | Pin selected by T3CKIPPS |
Reset States: |
|