20.13.4 TxGATE

Timer Gate Source Selection Register
Name: TxGATE
Offset: 0x0290,0x0296

Bit 76543210 
    GSS[4:0] 
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bits 4:0 – GSS[4:0] Timer Gate Source Selection

Table 20-5. Timer Gate Sources
GSSGate Source
Timer1Timer3
11111-10011Reserved
10010CLC4_OUT
10001CLC3_OUT
10000CLC2_OUT
01111CLC1_OUT
01110ZCD_OUT
01101C1_OUT
01100NCO1_OUT
01011PWM5_OUT
01010PWM4_OUT
01001PWM3_OUT
01000CCP2_OUT
00111CCP1_OUT
00110TMR6_Postscaled_OUT
00101TMR4_Postscaled_OUT
00100TMR3_overflowReserved
00011TMR2_Postscaled_OUT
00010ReservedTMR1_overflow
00001TMR0_overflow
00000Pin selected by T1GPPSPin selected by T3GPPS