19.5.2 T0CON1

Timer0 Control Register 1
Name: T0CON1
Offset: 0x019F

Bit 76543210 
 CS[2:0]ASYNCCKPS[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 7:5 – CS[2:0] Timer0 Clock Source Select

ValueDescription
111CLC1_OUT
110SOSC
101MFINTOSC (500 kHz)
100LFINTOSC
011HFINTOSC
010FOSC/4
001Pin selected by T0CKIPPS (Inverted)
000Pin selected by T0CKIPPS (Non-inverted)

Bit 4 – ASYNC TMR0 Input Asynchronization Enable

ValueDescription
1The input to the TMR0 counter is not synchronized to system clocks
0The input to the TMR0 counter is synchronized to Fosc/4

Bits 3:0 – CKPS[3:0] Prescaler Rate Select

ValueDescription
11111:32768
11101:16384
11011:8192
11001:4096
10111:2048
10101:1024
10011:512
10001:256
01111:128
01101:64
01011:32
01001:16
00111:8
00101:4
00011:2
00001:1