60.6.3.3.8 PIOBUx Alarm Filtering in Static Mode

Filtering the PIOBUx alarm detection is done by programming SECUMOD_PIOBUx.PIOBU_AFV with the value that corresponds to the maximum counter value. See SECUMOD_PIOBUx. The steps are as follows:

  1. A 9-bit counter is incremented each time the value present on the corresponding input is not the expected one.
  2. An alarm is sent to the Protection Manager if the counter value reaches the value programmed in PIOBU_AFV.

The 9-bit counter is reset only if the value present on the input is correct and stable for a continuous programmable period defined by SECUMOD_PIOBUx.PIOBU_RFV. Another 9-bit counter is necessary for that operation. See the figure PIOBUx Alarm Filtering Principle.

Figure 60-4. PIOBUx Alarm Filtering Principle

At reset, the debouncers are not activated (PIOBU_AFV and PIOBU_RFV=0), which implies that no alarm can be generated.

Once both PIOBU_AFV and the PIOBU_RFV are programmed, the corresponding protection is activated and a clear signal is generated automatically when an intrusion is detected.

Instead of clearing the secure memories content, an interrupt or a wakeup signal can be generated. To do so, disable the protection in the Normal Mode Protection register (SECUMOD_NMPR) and configure the Normal Interrupt Enable Protection register (SECUMOD_NIEPR).

Note: If the Normal Mode Protection/Backup Mode Protection registers are not hidden, their configuration has priority over the debouncer activation in the PIOBUx configuration registers. This means that clear signal generation is enabled/disabled in those two registers. Setting the PIOBU_AFV and PIOBU_RFV fields configure the debouncer sensitivity and does not generate any clear signal when an intrusion is detected.