60.7.7 SECUMOD PIO Backup Register x
The FILTER3_5 and DYNSTAT fields only exist for PIOBUs with an even index.
| Name: | SECUMOD_PIOBUx |
| Offset: | 0x18 + x*0x04 [x=0..3] |
| Reset: | 0x00001400 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| FILTER3_5 | DYNSTAT | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| SWITCH | SCHEDULE | PULLUP[1:0] | PIO_PDS | PIO_SOD | OUTPUT | ||||
| Access | R/W | R/W | R/W | R/W | RO | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 1 | 1 | 0 | 0 | ||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PIOBU_RFV[3:0] | PIOBU_AFV[3:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 21 – FILTER3_5 Filter for Dynamic Signatures Input
| Value | Description |
|---|---|
| 0 | 3-stage majority vote (default). |
| 1 | 5-stage majority vote. |
Bit 20 – DYNSTAT Switch for Static or Dynamic Detection Intrusion
When the Dynamic Intrusion mode is selected, the user must write 0 to the PIOBU_AFV and PIOBU_RFV fields and write a ‘1’ to OUTPUT for the two PIOs of the dynamic pair, to deactivate Static Detection. If one of these fields is not completely reset, the Static Detection mechanism is still partially running and can interpret the dynamic signal as an attack. The two detection modes are incompatible on the same pins.
If the application requires dynamic signatures to be stopped/restarted several times, it is recommended to set the detection threshold to a value greater or equal to 2 in SECUMOD_DYSTUNE in RX_ERROR_THRESHOLD, or to mask the PIO protection during the first millisecond following each dynamic signature start.
| Value | Description |
|---|---|
| 0 | Static detection intrusion (default). |
| 1 | Dynamic detection intrusion. |
Bit 15 – SWITCH Switch State for Intrusion Detection
| Value | Description |
|---|---|
| 0 | Input default state is low level. |
| 1 | Input default state is high level. |
Bit 14 – SCHEDULE Pull-up/Pull-down Scheduled
| Value | Description |
|---|---|
| 0 | Pull-up/Pull-down is not scheduled. |
| 1 | Pull-up/Pull-down is scheduled. |
Bits 13:12 – PULLUP[1:0] Programmable Pull-up State
Used to control the internal pull-up or pull-down.
| PULLUP | Description | |
|---|---|---|
| 0 | 0 | No pull-up / pull-down connected. |
| 0 | 1 | Pull-up connected. |
| 1 | 0 | Pull-down connected. |
| 1 | 1 | Reserved |
Bit 10 – PIO_PDS Level on the Pin in Input Mode (OUTPUT = 0)
| Value | Description |
|---|---|
| 0 | The I/O line is at level 0. |
| 1 | The I/O line is at level 1. |
Bit 9 – PIO_SOD Set/Clear the I/O Line when configured in Output Mode (OUTPUT =1)
| Value | Description |
|---|---|
| 0 | Clears the data to be driven on the I/O line. |
| 1 | Sets the data to be driven on the I/O line. |
Bit 8 – OUTPUT Configure I/O Line in Input/Output
| Value | Description |
|---|---|
| 0 | The I/O line is a pure input. |
| 1 | The I/O line is enabled in output. |
Bits 7:4 – PIOBU_RFV[3:0] PIOBUx Reset Filter Value
Defines the number of consecutive valid states to be reached before resetting the AFV counter.
Must be set to 0 when Dynamic Intrusion is selected.
| PIOBU_RFV | Maximum Counter Value |
|---|---|
| 0 | 0 (No static protection) |
| 1 | 2 |
| 2 | 4 |
| 3 | 8 |
| 4 | 16 |
| 5 | 32 |
| 6 | 64 |
| 7 | 128 |
| 8 | 256 |
| 9 | 512 |
Bits 3:0 – PIOBU_AFV[3:0] PIOBU Alarm Filter Value
Used to define the filter value prior to generating an alarm.
Must be set to 0 when Dynamic Intrusion is selected.
| PIOBU_AFV | Maximum Counter Value |
|---|---|
| 0 | 0 (No static protection) |
| 1 | 2 |
| 2 | 4 |
| 3 | 8 |
| 4 | 16 |
| 5 | 32 |
| 6 | 64 |
| 7 | 128 |
| 8 | 256 |
| 9 | 512 |