19.1.4.12.1 Arm Exception Vector Check

The ROM code analyzes the first 28 bytes corresponding to the first seven Arm exception vectors. Except for the sixth vector, these bytes must implement the Arm instructions for either branch or load PC with PC-relative addressing.

Figure 19-5. LDR Opcode
Figure 19-6. B Opcode

Unconditional instruction: 0xE for bits 31 to 28.

Load PC with the PC-relative addressing instruction:
  • Rn = Rd = PC = 0xF
  • I==0 (12-bit immediate value)
  • P==1 (pre-indexed)
  • U offset added (U==1) or subtracted (U==0)
  • W==1

The sixth vector, at offset 0x14, contains the size of the image to download. The user must replace this vector with the user’s own vector. This procedure is described below.

Figure 19-7. Arm Vector 6 Structure

The value must be lower than 64 Kbytes

The following is an example of valid vectors:

					
00			ea000006					B 0x20
04			eafffffe					B 0x04
08			eafffffe					B 0x08
0c			eafffffe					B 0x0c
10			eafffffe					B 0x10
14			00001234					← Code size = 4660 bytes
18			eafffffe					B 0x18